EU-funded project helps unleash the performance potential of mobile devices
European group of high-tech companies is pursuing parallel processing to bring power-hungry mobile applications such as video and interactive gaming to the consumer world, parallel computing
takes place when many instructions are carried out simultaneously to solve a problem.
While it has been used for many years in high-performance computing, parallel computing has only recently become the dominant paradigm in computer architecture, mainly in the form of multicore
The main focus of the EU-funded ‘Advanced Compiler Technologies for Embedded Streaming’ (ACOTES) project is to maximise the potential of parallel computing in computer chips, while extending
the battery life of popular consumer devices. In this way, it hopes to bring consumers longer lasting mobile phones or the ability to watch TV on mobile devices without experiencing severe
‘ACOTES will re-define the power-performance ratio to achieve highly optimised and predictable battery lifetimes for mobile devices,’ explains Harm Munk, ACOTES Project leader at NXP
Semiconductors. ‘By getting more parts of the chip to work in parallel, ACOTES increases the utilisation of contemporary and future parallel chip architectures. ACOTES will allow future
parallel architectures to really flex their computer power muscles!’ he added.
So although most chips today incorporate the ability to run computing tasks in parallel, very few actually make use of the full performance potential available. And this is where the ACOTES
project comes in. It will seek to help chips reach a higher level of parallelism.
‘Although the amount of parallelism built into the chips is increasing, it is also introducing greater complexity for application programmers who are now being challenged with expressing the
parallelism and prioritising the way computing tasks and resources should be allocated,’ points out Dr David Bernstein from the IBM Research Lab in Haifa, Israel, one of the partners in the
project. ‘ACOTES tools and methodologies will make it easier to program and develop applications that take maximum advantage of the chip’s parallelism,’ he said.
The three-year project, involving four major companies from the field, one research institute and one university, will create new tools which will take advantage of 90% of chip parallelism for
selected applications, as opposed to the 40% or 50% currently being utilised today.
In addition, the results of the project will be made available to the open source community as a first step towards shaping an infrastructure upon which future projects and technologies can be
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